Processing systems are generally known in the art and are utilized in a variety of devices. Some processing systems have an internal memory which supplies all of the processing system's data and/or instructions. However, internal memories have limited capacities and capabilities and thus, in some situations, the processing system is connected to an external memory, which augments the storage space of the internal memory. Additionally, external memories allow multiple processing systems to access the memory and therefore provide a greater flexibility.
A drawback to the use of an external memory is that accessing an external memory generally requires a greater amount of power than required to access an internal memory and in some situations can take a longer amount of time. Thus, in situations where the processing system is under power and/or time constraints, there is an incentive to minimize the external memory accesses. However, it may not be possible to include all of the data and/or instructions in the internal memory and thus, an external memory is often required.
In prior art processing systems, the external memory is accessed in bursts. In other words, a large block of external memory is accessed substantially consecutively. This results in a spike in the energy demands of the processing system. In environments where the processing system is not under an energy constraint, this type of memory access is adequate. However, where there are power constraints, for example, if the processing system is powered via a two-wire loop, a spike in required power can adversely affect components that share a power source with the processing system as the power delivered to the processing system is limited, in part, by the signaling sent on the two-wire loop. The example of the two-wire loop is merely an example and should not limit the scope of the invention as there are numerous other situations where the power delivered to a processing system is limited. Although prior art processing systems have attempted to reduce the overall power consumption, this is not always an adequate solution because even if the overall power consumption is reduced, temporary spikes in power consumption can still adversely affect the system.
Therefore, the present invention provides a method for executing a processing routine while controlling access to an external memory.
Aspects
According to an aspect of the invention, a method for executing a processing routine utilizing an external memory and requiring more than one external memory access, comprises the step of:
distributing the external memory accesses based on a predetermined number of consecutive external memory accesses.
Preferably, the method further comprises the step of distributing the external memory accesses such that the number of consecutive external memory accesses is minimized.
Preferably, the method further comprises the step of distributing the external memory accesses substantially evenly.
Preferably, the step of distributing the external memory accesses comprises temporarily interrupting access to the external memory for a predetermined amount of time after a predetermined number of consecutive external memory accesses.
Preferably, the processing routine further utilizes an internal memory and wherein the step of distributing external memory accesses comprises interrupting access to the external memory after a predetermined number of external memory accesses with a predetermined number of internal memory accesses.
Preferably, the predetermined number of consecutive external memory accesses is based on an available energy supply.
According to another aspect of the invention, a method for executing a processing routine utilizing an external memory, comprises the steps of:
determining an available energy supply; and
accessing the external memory based on the available energy supply.
Preferably, the method further comprises the step of accessing the external memory only if the available energy supply exceeds a threshold value.
Preferably, the processing routine further utilizes an internal memory and the method further comprises the step of accessing the internal memory if the available energy supply does not exceed a threshold value.
Preferably, the method further comprises the step of distributing the external memory accesses if the available energy supply does not exceed a threshold value.
Preferably, the method further comprises the step of distributing the external memory accesses based on a predetermined number of consecutive external memory accesses.
Preferably, the predetermined number of consecutive external memory accesses is determined at least in part by the available energy supply level.
Preferably, the processing routine further utilizes an internal memory and the method further comprises the step of distributing access to the external memory by interrupting access to the external memory after a predetermined number of consecutive external memory accesses with a predetermined number of internal memory accesses.
According to another aspect of the invention, a processing system, comprising:
an external memory; and
a processor adapted to execute a processing routine utilizing the external memory, wherein the processor is configured to distribute external memory accesses based on a predetermined number of consecutive external memory accesses.
Preferably, the processor is further configured to distribute the external memory accesses such that the number of consecutive external memory accesses is minimized.
Preferably, the processor is further configured to substantially evenly distribute the external memory accesses.
Preferably, the processor is further configured to temporarily interrupt access to the external memory for a predetermined amount of time after a predetermined number of consecutive external memory accesses.
Preferably, the processing system further comprises an internal memory, wherein the processor is further configured to distribute external memory accesses by interrupting access to the external memory after a predetermined number of external memory accesses with a predetermined number of internal memory accesses.
Preferably, the predetermined number of consecutive external memory accesses is based on an available energy supply.